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features ? integrated pll loop filter esd protection al so at ant1/ant2 (4 kv hbm/200 v mm; except pin 2: 4 kv hbm/100 v mm) high output power (8.0 dbm) with low supply current (9.0 ma) modulation scheme ask/fsk ? fsk modulation is achieved by connecti ng an additional ca pacitor between the xtal load capacitor and the open drain output of the modulating microcontroller easy to design-in due to ex cellent isolation of the pll from the pa and power supply single li-cell for power supply supply voltage 2.0v to 4.0v in the temperature range of ?40c to +85c/125c package tssop8l single-ended antenna output with high efficient power amplifier clk output for clocking the microcontroller one-chip solution with minimum external circuitry 125c operation for tire pressure systems 1. description the t5753 is a pll transmitter ic whic h has been developed for the demands of rf low-cost transmission systems at data rates up to 32 kbaud. the transmitting frequency range is 310 mhz to 350 mhz. it can be used in both fsk and ask systems. figure 1-1. system block diagram micro- controller pll uhf ask/fsk remote control receiver uhf ask/fsk remote control transmitter t5753 u3741b/ u3745b/ t5743/ t5744 lna vco pll xto lna vco antenna demod if amp control 1 to 3 encoder atarx9x xto 1 li cell keys antenna uhf ask/fsk transmitter t5753 4510i?rke?02/07
2 4510i?rke?02/07 t5753 2. pin configuration figure 2-1. pinning tssop8l enable 3 4 2 1 vs gnd t5753 xtal clk pa_enable 8 7 6 5 ant2 ant1 table 2-1. pin description pin symbol function configuration 1clk clock output signal for microcontroller the clock output frequency is set by the crystal to f xtal /4 2 pa_enable switches on power amplifier, used for ask modulation 3 4 ant2 ant1 emitter of antenna output stage open collector antenna output 100 ? 100 ? clk vs 50 k ? 20 a u ref = 1.1v pa_enable ant1 ant2
3 4510i?rke?02/07 t5753 figure 2-2. block diagram 5 xtal connection for crystal 6 vs supply voltage see esd protection circuitry (see figure 4-5 on page 9 ) 7 gnd ground see esd protection circuitry (see figure 4-5 on page 9 ) 8 enable enable input table 2-1. pin description (continued) pin symbol function configuration 1.5 k ? 1.2 k ? 182 a xtal vs vs 200 k ? enable t5753 cp power up/down pdf 32 5 6 7 8 4 3 2 xtal vs gnd enable ant1 ant2 pa_enable clk 1 f lf pa vco pll xto 4 f
4 4510i?rke?02/07 t5753 3. general description this fully integrated pll transmit ter allows particularly simple, low-cost rf miniature transmit- ters to be assembled. the vco is locked to 32 f xtal hence a 9.8438 mhz crystal is needed for a 315 mhz transmitter. all other pll and vco peripheral elements are integrated. the xto is a series resonance oscillator so that only one capacitor toget her with a crystal con- nected in series to gnd are needed as external elements. the crystal oscillator toge ther with the pll needs typically < 3 ms until the pll is locked and the clk output is stable. th ere is a wait time of 3 ms until the clk is used for the microcontroller and the pa is switched on. the power amplifier is an open-collector output delivering a current pulse which is nearly inde- pendent from the load impedance. the delivered output power is hence controllable via the connected load impedance. this output configuration enables a simple matching to any kind of antenna or to 50 ? . a high power efficiency of =p out /(i s,pa v s ) of 40% for the power amplifier results when an optimized load impedance of z load = (255 + j192) ? is used at 3 v supply voltage. 4. functional description if enable = l and the pa_enable = l, the circuit is in standby mode consuming only a very small amount of current so that a lithium cell used as power supply can work for several years. with enable = h the xto, pll and the clk driv er are switched on. if pa_enable remains l only the pll and the xto is running and the clk signal is delivered to the microcontroller. the vco locks to 32 times the xto frequency. with enable = h and pa_enable = h the pll, xto, clk driver and the power amplifier are on. with pa_enable the power amplifier can be switched on and off, which is used to perform the ask modulation. 4.1 ask transmission the t5753 is activated by enable = h. pa_enable must remain l for typically 3ms, then the clk signal can be taken to clock the microcontroller and the output power can be modulated by means of pin pa_enable. after transmiss ion pa_enable is switched to l and the micro- controller switches back to inte rnal clocking. the t5753 is swit ched back to standby mode with enable = l. 4.2 fsk transmission the t5753 is activated by enable = h. pa_enable must remain l for typically 3ms, then the clk signal can be taken to clock the microcontroller and the power amplifier is switched on with pa_enable = h. the chip is then ready for fsk modulation. the microcontroller starts to switch on and off the capacitor between the xtal load capacitor and gnd with an open-drain output port, thus changing the reference frequency of the pll. if the switch is closed, the output frequency is lower than if the switch is open. a fter transmission pa_enable is switched to l and the microcontroller switches back to inte rnal clocking. the t5753 is switched back to standby mode with enable = l. the accuracy of the frequency dev iation with xtal pulling method is about 25% when the fol- lowing tolerances are considered.
5 4510i?rke?02/07 t5753 figure 4-1. tolerances of frequency modulation using c 4 =8.2pf5%, c 5 = 10 pf 5%, a switch port with c switch = 3 pf 10%, stray capaci- tances on each side of the crystal of c stray1 =c stray2 = 1 pf 10%, a parallel capacitance of the crystal of c 0 = 3.2 pf 10% and a crystal with c m = 13 ff 10%, an fsk deviation of 21.5 khz typical with worst case tolerances of 16.25 khz to 28.01 khz results. 4.3 clk output an output clk signal is provided for a connect ed microcontroller, the delivered signal is cmos compatible if the load capa citance is lower than 10 pf. 4.3.1 clock pulse take-over the clock of the crystal oscillator can be used for clocking the microcontroller. atmel ? ?s atarx9x has the special feature of starting with an integrated rc-oscillator to switch on the t5753 with enable = h, and after 1 ms to assume the clock signal of the transmission ic, so that the message can be sent with crystal accuracy. 4.3.2 output matching and power setting the output power is set by the load impedance of the antenna. the maximum output power is achieved with a load impedance of z load,opt = (255 + j192) ? . there must be a low resistive path to v s to deliver the dc current. the delivered current pulse of the power amplifier is 9 ma and the maximum output power is delivered to a resistive load of 400 ? if the 1.0 pf output capacitance of the power amplifier is compensated by the load impedance. an optimum load impedance of: z load =400 ? || j/(2 1.0pf)=(255+j192) ? thus results for the maximum output power of 8dbm. the load impedance is defined as the impedance seen from the t5753?s ant1, ant2 into the matching network. do not confuse this large signal load impedance with a small signal input impedance delivered as input characteristic of rf amplifiers and measured from the application into the ic instead of from the ic into the application for a power amplifier. less output power is achieved by lowering the real parallel part of 400 ? where the parallel imag- inary part should be kept constant. output power measurement can be done with the circuit of figure 4-2 . note that the component values must be changed to compensate the individual board parasitics until the t5753 has the right load impedance z load,opt = (255 + j192) ? . also the damping of the cable used to measure the output power must be calibrated out. r s l m c 4 c m v s xtal crystal equivalent circuit c 0 c 5 c switch c stray1 c stray2
6 4510i?rke?02/07 t5753 figure 4-2. output power measurement at f = 315 mhz note: for 345 mhz c 2 has to be changed to 2.7 pf 4.4 application circuit for the blocking of the supply voltage a capacitor value of c 3 = 68 nf/x7r is recommended (see figure 4-3 on page 7 and figure 4-4 on page 8 ). c 1 and c 2 are used to match the loop antenna to the power amplifier where c 1 typically is 22 pf/np0 and c 2 is 10.8 pf/np0 (18 pf + 27 pf in series); for c 2 two capacitors in series should be used to achieve a better tol- erance value and to have the possibility to realize the z load,opt by using standard valued capacitors. c 1 forms together with the pins of t5753 and th e pcb board wires a series resonance loop that suppresses the 1 st harmonic, hence the position of c 1 on the pcb is important. normally the best suppression is achieved when c 1 is placed as close as possible to the pins ant1 and ant2. the loop antenna should not exceed a width of 1. 5 mm, otherwise the q-factor of the loop antenna is too high. l 1 ([50 nh to 100 nh) can be printed on pcb. c 4 should be selected that the xto runs on the load resonance frequency of the crystal. normally, a value of 12 pf results for a 15 pf load-capacitance crystal. 1 nf 3.3 pf 56 nh c 1 c 2 l 1 v s r in ant2 ant1 z lopt power meter 50 ? z = 50 ?
7 4510i?rke?02/07 t5753 figure 4-3. ask application circuit atarx9x t5753 cp power up/down pdf 32 5 6 7 1 vdd bpxy 20 vss vs 8 4 3 2 xtal xtal vs vs vs gnd enable ant1 l1 c1 c4 c3 loop antenna c2 ant2 pa_enable osc1 bpxy bpxy bpxy s1 s2 7 clk 1 f lf pa vco pll xto 4 f
8 4510i?rke?02/07 t5753 figure 4-4. fsk application circuit atarx9x t5753 cp power up/down pdf 32 5 6 7 1 vdd bpxy 20 vss vs 8 4 3 2 xtal xtal vs vs vs gnd enable ant1 l1 c1 c5 c4 c3 loop antenna c2 ant2 pa_enable osc1 bpxy bpxy bpxy s1 s2 7 clk 1 f lf pa vco pll xto 4 f 18 bp42/t2o
9 4510i?rke?02/07 t5753 figure 4-5. esd protection circuit clk vs gnd pa_enable xtal ant2 enable ant1 5. absolute maximum ratings stresses beyond those listed under ?absolute maximum ratings? may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions beyond t hose indicated in the operational sections of this specification is not implied. exposure to absolute maximum rati ng conditions for extended periods may affect device reliability . parameters symbol minimum maximum unit supply voltage v s 5v power dissipation p tot 100 mw junction temperature t j 150 c storage temperature t stg ?55 125 c ambient temperature t amb ?55 125 c input voltage v maxpa_enable ?0.3 (v s + 0.3) (1) v note: 1. if v s + 0.3 is higher than 3.7v, the maximum voltage will be reduced to 3.7v. 6. thermal resistance parameters symbol value unit junction ambient r thja 170 k/w 7. electrical characteristics v s = 2.0v to 4.0v, t amb = ?40c to 125c unless otherwise specified. typical values are given at v s = 3.0v and t amb = 25c. all parameters are referred to gnd (pin 7). parameters test conditions symbol min. typ. max. unit supply current power down, v enable < 0.25 v, -40c to 85c v pa-enable < 0.25 v, -40c to +125c v pa-enable < 0.25 v, 25c (100% correlation tested) i s_off <10 350 7 na a na supply current power up, pa off, v s = 3 v, v enable >1.7v, v pa-enable <0.25v i s 3.7 4.8 ma supply current power up, v s = 3.0 v, v enable >1.7v, v pa-enable >1.7v i s_transmit 911.6ma output power v s =3.0v, t amb = 25c, f = 315 mhz, z load = (255 + j192)w p ref 6.0 8.0 10.5 dbm note: 1. if v s is higher than 3.6v, the maximum voltage will be reduced to 3.6v.
10 4510i?rke?02/07 t5753 output power variation for the full temperature range t amb = ?40c to +85c, v s = 3.0v v s = 2.0v ? p ref ? p ref ?1.5 ?4.0 db db output power variation for the full temperature range t amb = ?40c to +125c, v s = 3.0v v s = 2.0v, p out = p ref + ? p ref ? p ref ? p ref ?2.0 ?4.5 db db achievable output-power range selectable by load impedance p out_typ 08.0dbm spurious emission f clk = f 0 /128 load capacitance at pin clk = 10 pf f o 1 f clk f o 4 f clk other spurious are lower ?55 ?52 dbc dbc oscillator frequency xto (= phase comparator frequency) f xto = f 0 /32 f xtal = resonant frequency of the xtal, c m 10 ff, load capacitance selected accordingly t amb = ?40c to +85c, t amb = ?40c to +125c f xto ?30 ?40 f xtal +30 +40 ppm ppm pll loop bandwidth 250 khz phase noise of phase comparator referred to f pc = f xt0, 25 khz distance to carrier ?116 ?110 dbc/hz in loop phase noise pll 25 khz distance to carrier ?86 ?80 dbc/hz phase noise vco at 1 mhz at 36 mhz ?94 ?125 ?90 ?121 dbc/hz dbc/hz frequency range of vco f vco 310 350 mhz clock output frequency (cmos microcontroller compatible) f 0 /128 mhz voltage swing at pin clk c load 10 pf v 0h v 0l v s 0.8 v s 0.2 v v series resonance r of the crystal rs 110 ? capacitive load at pin xt0 7pf fsk modulation frequency rate duty cycle of the modulation signal = 50% 0 32 khz ask modulation frequency rate duty cycle of the modulation signal = 50% 0 32 khz enable input low level input voltage high level input voltage input current high v il v ih i in 1.7 0.25 20 v v a pa_enable input low level input voltage high level input voltage input current high v il v ih i in 1.7 0.25 v s (1) 5 v v a 7. electrical characteristics (continued) v s = 2.0v to 4.0v, t amb = ?40c to 125c unless otherwise specified. typical values are given at v s = 3.0v and t amb = 25c. all parameters are referred to gnd (pin 7). parameters test conditions symbol min. typ. max. unit note: 1. if v s is higher than 3.6v, the maximum voltage will be reduced to 3.6v.
11 4510i?rke?02/07 t5753 9. package information 8. ordering information extended type number package remarks T5753-6AQJ tssop8l taped and reeled, marking: t573, pb-free t5753-6apj tssop8l taped and reeled, marking: t573, small reel, pb-free note: 1. j = ?40c to +125c + lead-free 3 0.1 0.85 0.05 0.1 0.05 specifications according to din technical drawings issue: 2; 15.03.04 drawing-no.: 6.543-5083.01-4 14 85 package: tssop 8l dimensions in mm 0.65 nom. 3 x 0.65 = 1.95 nom. 0.31 -0.07 +0.06 0.15 -0.02 +0.05 1 -0.15 +0.05 3.8 0.3 4.9 0.1 3 0.1
12 4510i?rke?02/07 t5753 10. revision history please note that the following page numbers referred to in this section refer to the specific revision mentioned, not to this document. revision no. history 4510i-rke-02/07 ? put datasheet in a new template ? pb-free logo on page 1 deleted 4510h-rke-09/05 ? pb-free logo on page 1 added 4510g-rke-02/05 ? put datasheet in a new template ? section 1 ?description? on page 1 changed ? figure title figure 4-2 on page 6 changed ? table ?electrical characteristics? on pages 9 to 10 changed ? table ?ordering information? on page 11 changed 4510f-rke-02/05 ? table ?absolute maximum ratings? (page 8): row ?input voltage? added ? table ?absolute maximum ratings? (page 8): table note 1 added ? table ?electrical characteristics? (page 10): row ?pa_enable input? changed ? table ?electrical characteristics? (page 10): table note 1 added ? table ?ordering information? (page 11): remarks changed
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